1. Field of the Invention
The present invention relates to a circuit board having patterns in the form of bumps with a very narrow variation-in height projecting from at least one surface thereof, and more specifically, to a circuit board formed having high-reliability conduction structures between its general output and input terminals and conductor circuits and which is capable of high-density packaging of semiconductor devices. The present invention also relates to a bump-type contact head obtained with use of the circuit board, capable of satisfactorily checking even fine-pitch circuit components, such as LSIs, liquid crystal panels, TABs, PDPs, etc., for wiring failures, and which enjoys high accuracy in pitches between inspection terminals and excellent high-frequency characteristics. In addition , the present invention relates to a method for manufacturing these elements with high productivity and at low cost.
Still further, the invention relates to a semiconductor component packaging module of a novel connection structure, using the aforesaid circuit board as a packaging substrate and having various semiconductor components mounted on the substrate by die bonding.
2. Prior Art
Usually, a semiconductor device package, which may be incorporated in various electronic apparatuses such as a computer, portable communication apparatus, liquid crystal panel, etc., is constructed so that one semiconductor device, such as a bare chip, is mounted on a circuit board that is formed with predetermined patterns for conductor circuits, the continuity between this device and the respective output and input terminals of the conductor circuits is established to package the semiconductor device, and the whole structure is resin-molded.
The semiconductor device may be packaged by a method in which it is die-bonded to the circuit board and the output and input terminals of the circuit board and the terminals (lands) of the semiconductor device are wire-bonded, a method in which a flip chip is connected to the output and input terminals of the circuit board by, for example, soldering, or a method in which the output and input terminals of the circuit board and lead terminals of the semiconductor device are directly connected by soldering.
The semiconductor device package manufactured in this manner is incorporated in practical equipment by being mounted on a mother board (packaging substrate) on which the conductor circuits with the predetermined patterns are arranged. Usually, in this case, the area ratio of one semiconductor device package to the mother board ranges from about {fraction (1/10)} to ⅕, so that a plurality of semiconductor device packages can be mounted on the mother board.
Conventionally, wire bonding is partially used for the mounting on the mother board. To meet the requirement for high-density packaging, however, a novel method has recently started to be widely used such that cream solder is pattern-printed on the lands of the mother board, the terminals (lead terminals or ball grid arrays) of the semiconductor device package are registered on the resulting pattern, and the whole resulting structure is subjected to blanket soldering in a reflow device.
There is a growing tendency for modern electronic apparatuses to become smaller in size, higher in operating speed, and more diverse in function. Accordingly, there is an increasing demand for the development of circuit boards capable of high-density packaging of semiconductor components despite the smallness in overall size.
To this end, it is advisable to use multilayer circuit boards and fine-pattern conductor circuits to be formed. Usually, however, conventional multilayer circuit boards are manufactured by the so-called build-up method, so that they involve the following problems.
In manufacturing a multilayer circuit board by the build-up method, a unit circuit board is first prepared by forming a conductor circuit, which serves as a signal pattern, on the surface of an insulating substrate as a bottom layer. Another unit circuit board, which is formed with another conductor circuit as another signal pattern, is put on the first one for unification. This operation is repeated so that a plurality of unit circuit boards are successively assembled from bottom to top.
In this case, a conduction structure between conductor circuits in each two adjacent layers, upper and lower, usually includes a plurality of through holes bored in a predetermined plane pattern through the unit circuit board in the thickness direction thereof. After the wall surface of each through hole is given electrical conductivity by, for example, electroless plating, electroplating is carried out with use of the conductor circuit in the lower layer as an electrical conduction path, and the respective lands of the conductor circuits in the upper and lower layers are connected electrically by means of the resulting deposit.
In order to effect the high-density packaging, therefore, the through holes should be made small in diameter. Practically, however, the hole diameter can be reduced only limitedly.
Generally, the through holes are formed by drilling, so that their diameter cannot be made very small in consideration of the drilling strength. Normally, the diameter of drilled holes ranges from 150 to 200 xcexcm. The diameter of through holes formed by photolithography ranges from about 100 to 150 xcexcm.
In the case where a deposit is formed on the wall surface of each bored through hole by combining the electroless plating and electroplating, it must secure a certain measure of thickness, since the electrical continuity between the conductor circuits in the upper and lower layers cannot be satisfactory if the deposit is too thin. For good electrical conduction between the conductor circuits, the thickness of the deposit is normally adjusted to about 20 to 30 xcexcm, depending on the type of the circuit board.
In general, therefore, a deposit with a thickness of 15 to 20 xcexcm is formed on the surface of each through hole with a diameter of 150 to 200 xcexcm, in the conduction structure based on the through holes. In the center of each through hole, in this case, exists a dead space with a diameter of about 100 to 150 xcexcm that has no connection with the conduction between the conductor circuits at all.
Also in the case of inner via holes, a dead space with a diameter of about 60 to 70 xcexcm is created if the diameter of each hole is, for example, 100 xcexcm. Thus, the diameter of the conventional through holes or inner via holes can be reduced only limitedly, and has no effect on the conduction between the conductor circuits, inevitably.
Normally, the following operation is carried out to form the deposit on the wall surface of each through hole in each of inner layers that are built up in succession. After electrical conductivity is given to the whole surface of a target inner layer (including the wall surface of each existing through hole or inner via hole) by electroless plating, a thin deposit is formed by electroplating the inner layer surface. Then, a dry film, for example, is sticked on the surface of the deposit so as to cover it, and is exposed and developed to expose only those portions corresponding to the through holes. The resulting structure is further electroplated with the remaining portion masked, whereupon a deposit of a given thickness is formed on the surface of each through hole (and land). Thereafter, the dry film is separated, and the thin deposit on the exposed surface of the inner layer and the deposit formed by the electroless plating are removed by, for example, soft etching.
In manufacturing a multilayer circuit board by building up the individual inner layers, therefore, the aforesaid operation must be repeated for each inner layer, so that complicated manufacturing processes are required. Thus, the manufacture takes long time, inevitably entailing high manufacturing costs.
In the case of the inner via holes, solid conduction structures may be formed between the layers by forming a deposit on the wall surface of each via hole and then embedding, for example, electrically conductive paste in the dead space remaining in the center of the deposit.
In this case, the solid conduction structures may possibly be formed by simultaneously electrodepositing and filling a conductive material in all the via holes by electroplating in place of the embedding of the conductive paste. In the build-up method, however, it is necessary to provide a conduction path separately for an input terminal for electroplating in advance in the first stage of the manufacture, so that the manufacturing processes are more complicated.
In forming a packaging substrate such as a semiconductor device package or a circuit board, such as a mother board, that has a projecting bump pattern on its packaging surface by the build-up method, a bump material is electrodeposited by, for example, electroplating to form the bump pattern with an intended height on a predetermined portion of a conductor circuit in the top layer, among other conductor circuits built up in succession.
In actual electroplating operation, however, all bumps that constitute the bump pattern cannot be formed with the same height, due to influences of delicate fluctuation in the plating conditions or variation in the flows of electric current to spots for the formation of the individual bumps, so that the bump height varies. In the case where the target bump height is 0.03 mm, for example, the bump height variation is about xc2x10.003 mm.
If the variation in the bump height is too wide, then some bumps will not be connected to the lands of the semiconductor device package even though the lands are positioned for a reflow process. Thus, reliable packaging cannot be effected.
In consideration of these circumstances, it is necessary to minimize the variation in the height of the bumps in the case of the circuit board that has the bump pattern formed on its packaging surface.
A contact head for checking wiring circuits in LSIs, liquid crystal panels, etc. for troubles is a kind of circuit board. Conventionally, in the contact head of this type, pin probes or L-shaped needles are embedded in an electrically insulating rigid material, and are fixed to the body of the head at predetermined pitches so that their respective tip ends can come into contact with predetermined inspection spots in a wiring circuit as an object of inspection. Also, wires are soldered individually to the respective other ends of the probes or needles so that signals for the inspection spots can be fetched from the other ends. On the other hand, there is a bump system in which bumps are formed by, for example, electroplating in specific circuit portions of a circuit board that has a predetermined circuit pattern, or by a film forming method that is used in the field of semiconductor production, and these bumps are operated in place of the aforesaid pin probes or L-shaped needles.
Recently, the circuit patterns of various circuit components as objects of inspection, and therefore, the pitches between the inspection spots have been becoming finer and finer.
To match the fine pitches between the inspection spots, in the case of a pin-probe head, holes to allow the tip ends of the pin probes to project are formed and arranged zigzag at infinitesimal intervals in the surface of the head. In the case of a head that uses L-shaped needles, the needles to be fixed are tiered.
These countermeasures, however, entail operation to fix at regular pitches the individual pin probes or L-shaped needles that increase remarkably in number as the pitches between the inspection spots become finer, and also, operation to solder a wire to each probe or needle. Thus, completion of products requires a great deal of skill and long operating time, so that the resulting heads are very expensive, inevitably. Even after the pin probes or L-shaped needles are fixed to the head, moreover, their respective tip ends require an accurate location and rearrangement therefor. During storage before shipping, furthermore, close attention must be paid not to run the probe or needle tips against other articles.
In the case of a head having tiered L-shaped needles, the respective elongate portions of the needles are arranged parallel to one another. If the frequencies of input and output signals are heightened, for example, to increase the speed of inspection, therefore, the resulting characteristics of the head may be adversely affected to cause inspection errors, in some cases.
In forming bumps of a bump-type head by electroplating, on the other hand, the bump height is subject to a substantial variation, as mentioned before. The wide variation in the bump height is fatal to the head in which all the bumps must be brought securely into contact with their corresponding inspection spots in the wiring circuit, as a vital necessity.
In the case where bumps are formed by means of a thin film manufacturing apparatus, which is used in the field of semiconductor production and is very expensive, the resulting heads are also very expensive, and a mechanism for integrating the heads with probe cards is necessary. Also required is a drive mechanism for moving the bumps upward, in order to bring them into contact with the inspection spots in the wiring circuit at the time of inspection, and downward after the inspection. Thus, the heads obtained are complicated in construction and more expensive.
If an attempt is made to mount semiconductor components on the conventional packaging substrate at high density, the dead space inevitably enlarges with the increase of spots for mounting the components, since the conduction structures are based on through holes or inner via holes, as mentioned before. In a packaging substrate of a certain standard size, therefore, the number of regions for the formation of necessary bump patterns (or lands) for component packaging and the extent thereof are limited, so that the effort toward high-density packaging is restricted. If high-density packaging is intended to be achieved, the arrangement of additional signal patterns is needed, so that the multilayer structure of the substrate or circuit board is bound to be further complicated. Accordingly, wires in the signal patterns are lengthened, so that the reliability of the electrical properties of the resulting packaging substrate may be lowered, in some cases.
An object of the present invention is to provide a circuit board, which has a bump pattern or patterns formed on at least one surface thereof so that the surface serves as a packaging surface for a bare chip or semiconductor device package, whereby the circuit board can be used as a substrate or mother board for semiconductor device packaging.
Another object of the invention is to provide a circuit board subject to a very narrow variation in bump height.
Still another object of the invention is to provide a circuit board designed so that small-diameter conduction structures can be secured between conductor circuits, thus permitting high-density packaging of a bare chip or semiconductor device package, etc.
A further object of the invention is to provide a circuit board capable of mounting a bare chip or semiconductor device package directly by means of bumps, thus ensuring labor-saving component packaging.
An additional object of the invention is to provide a manufacturing method for a circuit board, in which bump patterns with a narrow variation in height are formed on at least one surface of the circuit board by, so to speak, an inverted build-up process, without carrying out machining that is required in manufacturing a multilayer circuit board by the conventional build-up process.
Another object of the invention is to provide a manufacturing method for a circuit board, in which conductor circuits and conduction structures can be formed by an electroplating process with a high current density such that the desired circuit board can be manufactured with high productivity.
A further object of the invention is to provide a bump-type contact head, capable of readily matching fine-pitch arrangement, if any, of an object of inspection, ensuring high-frequency inspection without errors, and enjoying low-cost production, and a manufacturing method therefor.
A further object of the invention is to provide a semiconductor component packaging module of a novel structure, in which a bare chip or semiconductor device package is mounted or packaged by means of bumps, and the bumps and land circuits of the bare chip or semiconductor device package are mechanically in contact with one another for electrical continuity.
In order to achieve the above objects, according to the present invention, there is provided a circuit board comprising: an insulating base having at least bumps on at least one surface thereof; conductor circuits in at least one layer on at least the one surface of and/or inside the insulating base; and a conduction structure for electrical connection formed between the bumps and the conductor circuits and/or between the conductor circuits, at least each of the bumps being a multilayer structure formed by successively electrodepositing at least two different electrically conductive materials.
Preferably, the conduction structure is formed of pillar-shaped conductors, and each bump is a two-layer structure having an outer layer portion formed of a corrosion-resistant conductive material, such as gold, nickel, or nickel alloy, and an inner layer portion formed of copper.
According to the invention, there is provided a method for manufacturing a circuit board, comprising: a step A of manufacturing a member A composed of an electrically conductive substrate, a thin conductor layer formed on at least one surface of the conductive substrate, an electrodeposit layer formed on one surface of the thin conductor layer, bumps of a multilayer structure embedded in predetermined positions in the electrodeposit layer and formed by successively electrodepositing at least two different electrically conductive materials, a resist portion A formed by coating the electrodeposit layer, first pillar-shaped conductors, conductor circuits, or land circuits embedded in the resist portion A and connected to the bumps, and second pillar-shaped conductors embedded in the resist portion A, connected to the conductor circuits or land circuits, and having an end face exposed in the surface of the resist portion A; a step B of manufacturing a member B(1) having a conductor circuit in a layer on the surface of the resist portion A of the member A or a member B(2) having conductor circuits in a plurality of layers and pillar-shaped conductors embedded in another resist portion B, the pillar-shaped conductors connecting the conductor circuits, and the last conductor circuit being formed on the surface of the resist portion B; a step C of manufacturing an integrated structure C formed by bonding that surface of the member B(1) or B(2) on the conductor circuit side to the surface of the insulating base by thermocompression so that the conductor circuits are embedded in the insulating base; and a step D of exposing the bumps by separating the conductive substrate from the integrated structure C and then successively removing the thin conductor layer and the electrodeposit layer by etching.
Preferably, the step A includes: a step A1 of forming the thin conductor layer by coating at least the one surface of the conductive substrate by electroplating; a step A2 of forming a resist layer al by coating the thin conductor layer and then optically exposing and developing the resist layer al so that the other surface of the thin conductor layer is exposed with the resist layer a1 left only on expected bump formation spots; a step A3 of forming the electrodeposit layer by electrodepositing an electrically conductive material on the exposed surface of the thin conductor layer by electroplating so that the conductive material is flush with the resist layer a1; a step A4 of forming recesses for bump, through which the surface of the thin conductor layer is exposed, in the electrodeposit layer by removing the resist layer a1 left on the expected bump formation spots; a step A5 of forming a resist layer a2 by coating the surface of the electrodeposit layer and then optically exposing and developing the resist layer a2, thereby forming the resist layer a2 with first holes connecting individually with the recesses for bump and plane patterns corresponding to the respective circuit patterns of the land circuits to be formed; a step A6 of electrodepositing a first conductive material in a layer in the recesses for bump and the first holes and on the plane patterns by electroplating, then additionally electrodepositing at least one conductive material different from the first conductive material on the resulting lamina, and filling up the recesses for bump, first holes, and plane patterns with a multilayer structure formed of two or more different conductive materials stacked in layers, thereby collectively forming the bumps, first pillar-shaped conductors, and land circuits; a step A7 of exposing the surface of the electrodeposit layer by removing the resist layer a2; a step A8 of coating the exposed surface of the electrodeposit layer, thereby forming a resist layer a3 with a thickness such that the respective end faces of the first pillar-shaped conductors are exposed; a step Ag of coating the respective end faces of the resist layer a3 and the first pillar-shaped conductors and forming a deposit film by electroless plating; a step A10 of forming a resist layer a4 by coating the deposit film, then optically exposing and developing the resist layer a4, and forming a plane pattern corresponding to the circuit pattern of the conductor circuit to be formed and plane patterns of holes connecting with the land circuits on the resist layer a4 so that the surface of the deposit film is exposed from the plane patterns; a step A11 of electrodepositing a conductive material on the plane patterns by electroplating, thereby collectively forming the conductor circuit and the pillar-shaped conductors connected to the land circuits; a step A12 of exposing the resist layer a3 by removing the resist layer a4 and removing the exposed deposit film by etching; a step A13 of forming the resist portion A composed of the resist layer a3 and a resist layer a5 by coating the conductor circuit, the pillar-shaped conductors connected to the land circuits, and the resist layer a3 with the resist layer a5 and then optically exposing and developing the resist layer a5, thereby forming second holes connecting with the conductor circuit and the pillar-shaped conductors connected to the land circuits; and a step A14 of forming the second pillar-shaped conductors by filling up the second holes with a conductive material by electroplating.
According to the invention, moreover, the step B(1) preferably includes: a step B1 of coating the whole surface of the resist layer a5 of the member A and forming a deposit film by electroless plating; a step B2 of forming a resist layer b1 by coating the deposit film, then optically exposing and developing the resist layer b1, and forming a plane pattern corresponding to the circuit pattern of the conductor circuit to be formed so that the surface of the deposit film is exposed from the plane pattern; a step B3 of electrodepositing a conductive material on the exposed surface of the deposit film by electroplating, thereby forming the conductor circuit; and a step B4 of exposing the resist layer a5 by removing the resist layer b1 and removing the exposed deposit film by etching.
According to the invention, moreover, the step B(2) includes: a step B5 of forming a resist layer b2 by coating the resist layer a5 and the conductor circuit of the member B(1), then optically exposing and developing the resist layer b2, and forming the resist layer b2 with a hole connecting with the conductor circuit; a step B6 of electrodepositing a conductive material in the hole by electroplating, thereby forming the pillar-shaped conductors; a step B7 of coating the whole surface of the resist layer b2 and forming a deposit film by electroless plating; a step B8 of forming a resist layer b3 by coating the deposit film, then optically exposing and developing the resist layer b3, and forming the resist layer b3 with a plane pattern corresponding to the circuit pattern of the conductor circuit to be formed so that the surface of the deposit film is exposed from the plane pattern; a step B9 of electrodepositing a conductive material on the plane pattern by electroplating, thereby forming the conductor circuit; and a step B10 of exposing the resist layer b2 by removing the resist layer b3 and removing the exposed deposit film by etching, each of the steps B5 to B10 being carried out at least once for the resist layer b2 and the conductor circuit on the surface thereof.
According to the invention, furthermore, the step A preferably includes: a step A1 of forming the thin conductor layer by coating at least the one surface of the conductive substrate by electroplating; a step A2 Of forming a resist layer a1 by coating the thin conductor layer and then optically exposing and developing the resist layer a1 so that the other surface of the thin conductor layer is exposed with the resist layer a1 left only on expected bump formation spots; a step A3 of forming the electrodeposit layer by electrodepositing an electrically conductive material on the exposed surface of the thin conductor layer by electroplating so that the conductive material is flush with the resist layer a1; a step A4 of forming recesses for bump, through which the surface of the thin conductor layer is exposed, in the electrodeposit layer by removing the resist layer a1, left on the expected bump formation spots; a step A15 of forming a resist layer a2 by coating the surface of the electrodeposit layer and then optically exposing and developing the resist layer a2, thereby forming the resist layer a2 with plane patterns connecting individually with the recesses for bump and corresponding to the respective circuit patterns of the conductor circuits to be formed, and if necessary, plane patterns corresponding to the respective circuit patterns of the land circuits; a step A16 of electrodepositing a first conductive material in a layer in the recesses for bump and on the plane patterns by electroplating, then electrodepositing at least one conductive material different from the first conductive material on the resulting lamina, and filling up the recesses for bump, the conductor-circuits, and if necessary, the land circuits with a multilayer structure formed of two or more different conductive materials stacked in layers, thereby collectively forming the bumps, conductor circuits, and if necessary, land circuits; a step A17 of forming a resist layer a3 by coating the conductor circuits, and if necessary, the land circuits, then optically exposing and developing the resist layer a3, and forming the resist layer a3 with first holes connecting individually with the conductor circuits, and if necessary, the land circuits; and a step A18 of electrodepositing a conductive material in the first holes by electroplating, thereby forming the pillar-shaped conductors.
According to the present invention, moreover, there""s provided a bump-type contact head comprising: an insulating substrate; a movable region formed in a predetermined position in the insulating substrate so that at least the upper surface of the movable region can move up and down, the upper surface of the movable region being flush with the upper surface of the insulating substrate; a plurality of signal conductors arranged on the upper surface of and/or inside the insulating substrate and extending to the movable region, at least the tip end of each of the signal conductors being situated in the movable region; and bumps protruding individually from the upper surfaces of the respective tip ends of the signal conductors, each of the bumps being a multilayer structure formed by successively electrodepositing at least two different electrically conductive materials.
Preferably, the movable region includes an aperture formed across the thickness of the insulating substrate and an elastic member disposed in the aperture, the upper surface of the elastic member being exposed through the top opening of the aperture.
Preferably, moreover, the movable region includes a thin-wall portion of an aperture having a stepped structure formed across the thickness of the insulating substrate so that the top side of the insulating substrate is thin-walled, the top opening of the aperture having a square plane shape such that slits extending toward the peripheral edge portion of the insulating substrate are cut individually in the four corners of the square opening so as to reach at least the basal part of the thin-wall portion of the stepped structure, the thin-wall portion having a plane shape analogous to a tongue.
Preferably, furthermore, the movable region includes an aperture having a stepped structure formed across the thickness of the insulating substrate so that the top side of the insulating substrate constitutes a thin-wall portion, the top opening having a square plane shape such that slits extending toward the peripheral edge portion of the insulating substrate are cut individually in the four corners of the square opening so as to reach at least the basal part of the thin-wall portion of the stepped structure, the thin-wall portion having a plane shape analogous to a tongue; and an elastic member disposed in the aperture, the upper surface of the elastic member being exposed through the top opening of the aperture so that the signal conductors are arranged extending up to the upper surface of the elastic member.
According to the present invention, there is provided a method for manufacturing a bump-type contact head, comprising: a step of forming a first resist layer by coating the surface of an electrically conductive sheet and then optically exposing and developing the first resist layer so that the surface of the conductive sheet is exposed in spots corresponding to the positions of bumps to be formed; a step of forming recesses for bump in the exposed surface of the conductive sheet by etching and then removing the first resist layer; a step of forming a second resist layer by coating the exposed surface of the conductive sheet and then optically exposing and developing the second resist layer, thereby exposing the surface of the conductive sheet in plane patterns corresponding to the respective patterns of signal conductors to be formed; a step of electrodepositing a first conductive material in a layer in the recesses for bump and on the plane patterns by electroplating, then additionally electrodepositing at least one conductive material different from the first conductive material on the resulting lamina, and filling up the recesses for bump and the plane patterns with a multilayer structure formed of two or more different conductive materials stacked in layers, thereby collectively forming the bumps and the signal conductors; a step of removing the second resist layer and then bonding the resulting exposed surface to the opening-side surface of an insulating substrate formed with an aperture having an opening in a predetermined shape; and a step of filling up a hollow portion defined by the aperture and the conductive sheet with an elastic member and then removing the conductive sheet by etching, thereby exposing the respective upper surfaces of the bumps and the signal conductors.
According to the present invention, moreover, there is provided a method for manufacturing a bump-type contact head, comprising: a step of forming a thin conductor layer by coating at least one surface of a conductive substrate by electroplating; a step of forming a first resist layer by coating the thin conductor layer and then optically exposing and developing the first resist layer so that the other surface of the thin conductor layer is exposed with the first resist layer left only on expected bump formation spots; a step of forming an electrodeposit layer by electrodepositing an electrically conductive material on the exposed surface of the thin conductor layer by electroplating so that the conductive material is flush with the first resist layer; a step of forming recesses for bump, through which the surface of the thin conductor layer is exposed, in the electrodeposit layer by removing the first resist layer left on the expected bump formation spots; a step of forming a second resist layer by coating the surface of the electrodeposit layer and then optically exposing and developing the second resist layer, thereby exposing the surface of the electrodeposit layer in plane patterns corresponding to the respective patterns of signal conductors to be formed; a step of electrodepositing a first conductive material in a layer in the recesses for bump and on the plane patterns by electroplating, then additionally electrodepositing at least one conductive material different from the first conductive material on the resulting lamina, and filling up the recesses for bump and the plane patterns with a multilayer structure formed of two or more different conductive materials stacked in layers, thereby collectively forming the bumps and the signal conductors; a step of removing the second resist layer and then bonding the resulting exposed surface to the opening-side surface of an insulating substrate formed with an aperture having an opening in a predetermined shape; and a step of filling up a hollow portion defined by the aperture and the electrodeposit layer with an elastic member, then separating the conductive substrate, successively removing the thin conductor layer and the electrodeposit layer by etching, thereby exposing the bumps and the signal conductors.
According to the present invention, furthermore, there is provided a semiconductor component packaging module comprising: a circuit board including an insulating base having bumps on at least one surface thereof, the bumps having a multilayer structure formed by electrodepositing two or more different conductive materials in layers; and a semiconductor component mounted on the circuit board with an adhesive, the semiconductor component having lands mechanically in contact with the bumps.
Preferably, the adhesive used for packaging is a bonding agent that contracts when set.